Overview
A functional MIPS emulator in C that simulates a CPU’s fetch-decode-execute cycle. The emulator parses MIPS assembly code, converts it to machine code and executes it on a virtual CPU with simulated registers and memory.
What it does
Converts a subset of MIPS assembly instructions into machine-level representations and executes them on a simulated CPU with virtual registers, memory models and program counter. Supports both I-type and R-type instructions including arithmetic, bitwise shifting, branching and memory access operations.
Why it’s interesting
This project gave me hands-on experience with ISA-level programming and computer architecture concepts. It made me consider how each instruction is executed on the CPU and how they impact register values.
Key Technical Points
- CPU Simulation: Implements the complete fetch-decode-execute cycle.
- Instruction Set: Supports arithmetic, memory operations and branching.
- Virtual Memory: Simulates program and data sections with address translation.
- Assembler: Converts assembly code to machine code with label resolution by breaking down instructions into opcodes and operands.
- Endian Handling: Manages byte order for cross-platform compatibility.
Tech Stack
Language: C, MIPS Assembly